Software reference

• 1. LWIP+ADC High performance solutions
  • 1.1. Depend on SDK1.10.0
  • 1.2. Introduction
  • 1.3. general_solution
  • 1.4. Sample
    • 1.4.1. Define the trigger source PWM for ADC and the interconnect manager used:
    • 1.4.2. Define the sampling rate of ADC and the length of data transmitted each time:
    • 1.4.3. Define LWIP to send ADC sampling results:
    • 1.4.4. DEMO：
  • 1.5. Code Path
  • 1.6. Code Configuration
  • 1.7. Code Build
  • 1.8. Hardware
  • 1.9. Runtime Environment
  • 1.10. Code Run
  • 1.11. API
• 2. General software architecture solution for Power
  • 2.1. Depend on SDK1.10.0
  • 2.2. Introduction
  • 2.3. general_solution
  • 2.4. Sample
    • 2.4.1. A pair of PWM MAP table creation：
    • 2.4.2. ADC MAP table creation：
    • 2.4.3. Define MP Power data objects ：
    • 2.4.4. Define MP and a pair of PWM trigger ADC sampling , execute callback function：
    • 2.4.5. Define MP High-resolution timer callback:
    • 2.4.6. DEMO：
  • 2.5. Code Path
  • 2.6. Code Configuration
  • 2.7. Code Build
  • 2.8. Hardware
  • 2.9. Code Run
  • 2.10. API
• 3. HPM PWM_ADC_SPI sample Documentation
  • 3.1. Depend on SDK1.10.0
  • 3.2. Introduction
  • 3.3. Application note
  • 3.4. general_solution
  • 3.5. adc sampling design process
  • 3.6. SPI_HDMA
  • 3.7. Sample code
    • 3.7.1. HDMA chain
    • 3.7.2. PWM two trigger sources：
    • 3.7.3. According to different SPI encoders, write the corresponding data:
    • 3.7.4. spi_buf can be used directly in ADC interrupts:
  • 3.8. Code Path
  • 3.9. Code Configuration
  • 3.10. Code Build
  • 3.11. Hardware
  • 3.12. Code Run
  • 3.13. API
• 4. HPM secondary Boot firmware upgrade solution
  • 4.1. Depend on SDK1.10.0
  • 4.2. Introduction
  • 4.3. Firmware Upgrade Process
    • 4.3.1. 1.Create an upgrade package
    • 4.3.2. 2.Download the upgrade package
    • 4.3.3. 3.Check the upgrade package
    • 4.3.4. 4.Update the firmware
  • 4.4. The key to downloading the upgrade package
    • 4.4.1. 1.Select the firmware transmission channel
    • 4.4.2. 2.Select the mode for downloading the upgrade package
    • 4.4.3. 3.Select the old and new firmware coverage modes
    • 4.4.4. 4.Flash partition
  • 4.5. Firmware upgrade flowchart of the solution
    • 4.5.1. Non-background download mode (secondary Boot)
    • 4.5.2. Background download and upgrade mode (User app)
  • 4.6. Sample introduce
    • 4.6.1. Non-background download mode(The secondary Boot)
    • 4.6.2. Background download mode
    • 4.6.3. Test procedure
  • 4.7. API
• 5. HPM Secondary BOOT Firmware V2 Upgrade Solution
  • 5.1. Depend on SDK1.10.0
  • 5.2. Introduction
  • 5.3. Features
  • 5.4. Introduction
    • 5.4.1. General Flash Partition
    • 5.4.2. RAM or FLASH XIP Operation
    • 5.4.3. Firmware Encryption
    • 5.4.4. Full Upgrade
    • 5.4.5. Differential Upgrade (Incremental Upgrade)
    • 5.4.6. Compressed Upgrade
  • 5.5. Operations
    • 5.5.1. Project Build
    • 5.5.2. Project compilation
    • 5.5.3. Make upgrade package
    • 5.5.4. Download upgrade package
    • 5.5.5. Firmware processing
    • 5.5.6. Upgrade completed
  • 5.6. API
• 6. Bootrom OTA
  • 6.1. Depend on SDK1.10.0
  • 6.2. Overview
  • 6.3. Demo
  • 6.4. Build
  • 6.5. OTA Guide
  • 6.6. API
• 7. HPM FEMC driver 8080 screen
  • 7.1. Depend on SDK1.10.0
  • 7.2. Introduction
  • 7.3. Application note
  • 7.4. Sample code
    • 7.4.1. FEMC Drive 8080 Screen Configuration:
    • 7.4.2. 8080 screen read and write control:
    • 7.4.3. PMP initialization modification:
  • 7.5. Code Path
  • 7.6. Code Configuration
  • 7.7. Code Build
  • 7.8. Hardware
  • 7.9. Code Run
  • 7.10. Lighting up the screen
  • 7.11. API
• 8. LED large screen driver scheme
  • 8.1. Depend on SDK1.10.0
  • 8.2. Overview
  • 8.3. Scheme introduction
    • 8.3.1. DMA
    • 8.3.2. GPTMR
    • 8.3.3. GPIO
    • 8.3.4. GPTMR+HDMA+GPIO
  • 8.4. Engineering path
  • 8.5. Engineering allocation
  • 8.6. Engineering construction
  • 8.7. Engineering operation
  • 8.8. Software API
• 9. hpm_motor library test demo
  • 9.1. Depend on SDK1.10.0
  • 9.2. introduction
  • 9.3. Sample
    • 9.3.1. Define trajectory planning structure variables
    • 9.3.2. Define the position mode/speed mode
    • 9.3.3. Define an array of shift instructions and speed instructions
    • 9.3.4. Define a 10ms timer
    • 9.3.5. Configure trajectory planning entry parameters
    • 9.3.6. Trajectory planning call function
    • 9.3.7. ISR
    • 9.3.8. DEMO
  • 9.4. Code Path
  • 9.5. Code Configuration
  • 9.6. Code Build
  • 9.7. Hardware
  • 9.8. Code Run
  • 9.9. test content
    • 9.9.1. speed mode，vel 10r/s，acc 100r/s/s，jerk 1000r/s/s/s
    • 9.9.2. speed mode，vel 10r/s，acc 10r/s/s，jerk 100r/s/s/s
    • 9.9.3. position mode，vel 10r/s，acc 100r/s/s，jerk 1000r/s/s/s，absolute position 20，move mode：continuous round mode
    • 9.9.4. position mode，vel 10r/s，acc 100r/s/s，jerk 1000r/s/s/s，absolute position 20，move mode：single
    • 9.9.5. position mode，vel 10r/s，acc 100r/s/s，jerk 1000r/s/s/s，absolute position 20，move mode：multiple ,move cycle :2
  • 9.10. API
• 10. HPM 5300 series rotary transformer hardware decoding scheme
  • 10.1. Depend on SDK1.10.0
  • 10.2. INTROduction
  • 10.3. Software configuration
  • 10.4. Hardware-directed design
  • 10.5. Code Path
  • 10.6. Code Configuration
  • 10.7. Code Build
  • 10.8. Hardware
  • 10.9. Code Run
  • 10.10. API
• 11. HPM5300_RDC
  • 11.1. Depend on SDK1.10.0
  • 11.2. Overview
  • 11.3. RDC theory
  • 11.4. hardware solution
  • 11.5. software solution
  • 11.6. TEST
    • 11.6.1. test instrument
    • 11.6.2. testing environment
    • 11.6.3. creat project
    • 11.6.4. hardware test
  • 11.7. data output test
    • 11.7.1. ABZ
    • 11.7.2. uart
    • 11.7.3. SPI
    • 11.7.4. bissc clave mode
    • 11.7.5. Tamagawa slave mode
  • 11.8. error test
    • 11.8.1. Angle error
    • 11.8.2. Test Summary
  • 11.9. API
• 12. HPM5300_RDC
  • 12.1. Depend on SDK1.10.0
  • 12.2. Overview
  • 12.3. hardware solution
    • 12.3.1. software solution
    • 12.3.2. TEST
    • 12.3.3. test instrument
    • 12.3.4. testing environment
    • 12.3.5. creat project
    • 12.3.6. hardware test
  • 12.4. theta/speed calculate
  • 12.5. API
• 13. hpm_monitor service demo
  • 13.1. Depend on SDK1.10.0
  • 13.2. Introduction
  • 13.3. hpm_monitor Service Activation
  • 13.4. Project Path
  • 13.5. Engineering Configuration
  • 13.6. Engineering Construction
  • 13.7. Project Operation
  • 13.8. API
• 14. Nor flash with SPI
  • 14.1. Depend on SDK1.10.0
  • 14.2. Overview
  • 14.3. Board Setting
  • 14.4. Running the example
  • 14.5. API
• 15. I2S_DMA_CHAIN solutions
  • 15.1. Depend on SDK1.10.0
  • 15.2. Introduction
  • 15.3. general_solution
  • 15.4. Sample
    • 15.4.1. DMA configuration used for receive and transmit data in I2S:
    • 15.4.2. Format configuration for I2S data transmission:
    • 15.4.3. Process the data received by I2S:
    • 15.4.4. DEMO：
  • 15.5. Code Path
  • 15.6. Code Configuration
  • 15.7. Code Build
  • 15.8. Hardware
  • 15.9. Code Run
  • 15.10. API
• 16. HPM Dual Port Ring Communication Solution
  • 16.1. Depend on Rtthread: V5.0.2
  • 16.2. Ring network topology
  • 16.3. routine description
    • 16.3.1. matrix
    • 16.3.2. Software Configuration
    • 16.3.3. hardware connection
  • 16.4. Test results
  • 16.5. Software API
• 17. HPM6E00 FULL PORT
  • 17.1. Depend on SDK1.10.0
  • 17.2. Overview
  • 17.3. Features
  • 17.4. File Structure
    • 17.4.1. Hardware Structure
    • 17.4.2. Software Structure
  • 17.5. Test Demo
    • 17.5.1. Simplest switch based on TSN(tsn_simplest_switch)
    • 17.5.2. Static MAC switch based on TSN(tsn_static_mac_switch)
    • 17.5.3. Dynamic MAC switch based on TSN(tsn_dynamic_mac_switch)
    • 17.5.4. IO control based on ESC(ecat_io)
  • 17.6. API
• 18. EtherCAT 主站
  • 18.1. Depend on SDK1.10.0
  • 18.2. Overview
  • 18.3. Feature
  • 18.4. Running the example
  • 18.5. API
• 19. HPM TSN Ring Network Communication Solution
  • 19.1. Depend on SDK1.10.0
  • 19.2. Overview
  • 19.3. HPM6E00EVK Ring Network Topology
  • 19.4. Example Program Details
    • 19.4.1. Environment
    • 19.4.2. Software Configuration
  • 19.5. Testing
  • 19.6. API
• 20. HPM5E00EVK Web Control System
  • 20.1. Overview
    • 20.1.1. Key Features
    • 20.1.2. Technology Stack
  • 20.2. Project Structure
  • 20.3. Quick Start
    • 20.3.1. Hardware Requirements
    • 20.3.2. Software Requirements
    • 20.3.3. Development Board Connection
    • 20.3.4. Build Project
    • 20.3.5. Compile and Run
  • 20.4. Runtime Behavior
    • 20.4.1. LOG
    • 20.4.2. Web Interface Features
    • 20.4.3. Serial Output
  • 20.5. API Endpoints
    • 20.5.1. 1. Heartbeat
    • 20.5.2. 2. Digital Input Status
    • 20.5.3. 3. EtherCAT Data
    • 20.5.4. 4. Segment Display Control
  • 20.6. Network Configuration
  • 20.7. Troubleshooting
    • 20.7.1. PC Cannot Obtain IP Address
    • 20.7.2. Cannot Access Web Interface
  • 20.8. Notes
  • 20.9. API
• 21. HPM_MONITOR + ADC High-Performance Data Monitoring Solution
  • 21.1. Depend on SDK1.10.0
  • 21.2. Introduction
  • 21.3. Features of the Solution
  • 21.4. Block Diagram and Call Flow
  • 21.5. Hardware Configuration
  • 21.6. Software Configuration
  • 21.7. Core Code Implementation
  • 21.8. Project Path
  • 21.9. Engineering Construction
  • 21.10. Hardware Configuration
  • 21.11. Project Operation
  • 21.12. Host Computer Configuration
  • 21.13. Operational Effect
  • 21.14. Important Notes
  • 21.15. API