mp_common.h

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/*
 * Copyright (c) 2023 HPMicro
 *
 * SPDX-License-Identifier: BSD-3-Clause
 *
 */
 
#ifndef MP_COMMON_H
#define MP_COMMON_H
 
#include <stdio.h>
#include "hpm_common.h"
#include "hpm_clock_drv.h"
#include "hpm_soc.h"
#include "hpm_soc_feature.h"
#include "pinmux.h"
#include "mp_config.h"
 
/***********************************************************************************************************************
 *
 * Definitions
 *
 **********************************************************************************************************************/
 
#ifdef HDMA_ADC_CHAIN_DOUBLE_BUF
#ifndef HDMA_ADC_DOUBLE_BUF
#define HDMA_ADC_DOUBLE_BUF
#endif
#endif
 
#ifdef __cplusplus
extern "C" {
#endif
 
typedef enum
{
    MP_PWM_SINGLE_TYPE = 0,
    MP_PWM_PAIR_TYPE,
    MP_PWM_TYPE_MAX
}mp_pwm_type;
 
typedef enum
{
    MP_PWM_PAIR_NUM_0 = 0,
    MP_PWM_PAIR_NUM_1,
    MP_PWM_PAIR_NUM_2,
    MP_PWM_PAIR_NUM_3,
    MP_PWM_PAIR_NUM_4,
    MP_PWM_PAIR_NUM_5,
    MP_PWM_PAIR_NUM_6,
    MP_PWM_PAIR_NUM_7,
    MP_PWM_PAIR_NUM_8,
    MP_PWM_PAIR_NUM_9,
    MP_PWM_PAIR_NUM_10,
    MP_PWM_PAIR_NUM_11,
    MP_PWM_PAIR_NUM_12,
    MP_PWM_PAIR_NUM_13,
    MP_PWM_PAIR_NUM_14,
    MP_PWM_PAIR_NUM_15,
    MP_PWM_PAIR_NUM_MAX
} mp_pwm_pair_index;
 
#define MP_PWM_PAIR_COUNT    (MP_PWM_PAIR_NUM_MAX)
 
typedef enum
{
    MP_PWM_NUM_0 = 0,
    MP_PWM_NUM_1,
    MP_PWM_NUM_2,
    MP_PWM_NUM_3,
    MP_PWM_NUM_4,
    MP_PWM_NUM_5,
    MP_PWM_NUM_6,
    MP_PWM_NUM_7,
    MP_PWM_NUM_MAX
} mp_pwm_index;
 
typedef enum
{
    MP_ADC_NUM_0 = 0,
    MP_ADC_NUM_1,
    MP_ADC_NUM_2,
    MP_ADC_NUM_3,
    MP_ADC_NUM_4,
    MP_ADC_NUM_5,
    MP_ADC_NUM_6,
    MP_ADC_NUM_7,
    MP_ADC_NUM_8,
    MP_ADC_NUM_9,
    MP_ADC_NUM_10,
    MP_ADC_NUM_11,
    MP_ADC_NUM_12,
    MP_ADC_NUM_13,
    MP_ADC_NUM_14,
    MP_ADC_NUM_15,
    MP_ADC_NUM_16,
    MP_ADC_NUM_17,
    MP_ADC_NUM_18,
    MP_ADC_NUM_19,
    MP_ADC_NUM_20,
    MP_ADC_NUM_21,
    MP_ADC_NUM_22,
    MP_ADC_NUM_23,
    MP_ADC_NUM_MAX
} mp_adc_index;
 
typedef enum
{
    MP_PWM_PAIR_MODE_REVERSE = 0,
    MP_PWM_PAIR_MODE_CENTRAL,
    MP_PWM_PAIR_MODE_EDGE,
    MP_PWM_PAIR_MODE_MAX
} mp_pwm_pair_mode;
 
typedef enum
{
    MP_PWM_PAIR_PHASE_ANGLE_0 = 0,
    MP_PWM_PAIR_PHASE_ANGLE_180 = 2,
    MP_PWM_PAIR_PHASE_ANGLE_120 = 3,
    MP_PWM_PAIR_PHASE_ANGLE_90 = 4,
    MP_PWM_PAIR_PHASE_ANGLE_72 = 5,
    MP_PWM_PAIR_PHASE_ANGLE_60 = 6,
    MP_PWM_PAIR_PHASE_ANGLE_45 = 8,
    MP_PWM_PAIR_PHASE_ANGLE_40 = 9,
    MP_PWM_PAIR_PHASE_ANGLE_36 = 10,
    MP_PWM_PAIR_PHASE_ANGLE_30 = 12
} mp_pwm_pair_phase_angle;
 
typedef enum
{
    MP_PWM_TRIGGER_MODE_OUTPUT = 0,
    MP_PWM_TRIGGER_MODE_DMA,
} mp_pwm_trigger_mode;
 
#define MP_PWM_TRIGGER_COUNT_MAX    (8)
 
#define MP_PWM_TRIGGER_ADC_BIT      (0)
 
typedef struct
{
    uint8_t adc_index;
    uint16_t io;
    ADC16_Type* adc16;
    uint8_t adc_ch;
} mp_adc_map_t;
 
typedef struct
{
    uint8_t mode;
    uint8_t trgm_cmp;
    uint8_t trgm_pin;
    TRGM_Type* trgm_base;
    uint8_t trgm_input;
    uint8_t trgm_output;
} mp_pwm_trigger_map_t;
 
#pragma pack(1)
typedef struct   
{
    uint32_t fault_mask;
    union
    {
        struct in_fault_t
        {
            uint8_t fault_level;
            uint8_t recover_level;
            TRGM_Type* trgm_base;
            uint8_t trgm_input;
            uint8_t trgm_output;
        } in_fault;
        struct ex_fault_t
        {
            uint8_t fault_level;
            uint8_t recover_level;
            uint16_t pin;
            uint32_t mux;            
        } ex_fault;
    };
} mp_pwm_fault_map_t;
#pragma pack()
 
typedef struct
{
    uint8_t pair_index;
    struct io_p
    {
        uint16_t pin;
        uint32_t mux;
    } io[2];
    PWM_Type* pwm_x;
    uint8_t cmp;
    uint8_t pin;
    mp_pwm_trigger_map_t pwm_trigger_map[MP_PWM_TRIGGER_COUNT_MAX];
    mp_pwm_fault_map_t pwm_fault_map;
} mp_pwm_pair_map_t;
 
typedef struct
{
    uint8_t index;
    struct io_t
    {
        uint16_t pin;
        uint32_t mux;
    } io;
    PWM_Type* pwm_x;
    uint8_t cmp;
    uint8_t pin;
    mp_pwm_trigger_map_t pwm_trigger_map[MP_PWM_TRIGGER_COUNT_MAX];
    mp_pwm_fault_map_t pwm_fault_map;
} mp_pwm_map_t;
 
typedef void (*hpm_mp_adc_over_callback)(void* handle);
 
typedef struct
{
    uint8_t adc_index; 
    uint8_t adc_map_index;
    uint8_t adc_irq_index;
    uint8_t adc_trig_ch;
    uint8_t adc_trig_index;
    uint16_t adc_data;
    uint32_t adc_buff_addr;
    uint32_t adc_buff_reserve[2];
} hpm_adc_t;
 
typedef struct
{
    uint8_t adc_count;
    hpm_adc_t* adc_pack;
} hpm_hdma_adc_t;
 
typedef void (*hpm_mp_hdma_over_callback)(hpm_hdma_adc_t* hdma_adc_t);
 
typedef struct
{
    uint8_t fault_level;
    uint8_t recovery_trigger;
} hpm_pwm_fault_t;
 
typedef struct
{
    uint8_t pwm_pair_index;
    uint8_t pwm_map_index;
    uint8_t pwm_pair_mode;
    uint8_t phase_angle;
    uint32_t deadzone_start_halfcycle;
    uint32_t deadzone_end_halfcycle;
    uint32_t pwm_freq;
    uint32_t bus_freq;
    uint32_t reload_count;
    uint32_t duty_count;
    uint32_t shadow_dutycount;
    bool fault_enable;
    hpm_pwm_fault_t pwm_fault[2];
    uint8_t trigger_count;
    uint8_t trigger_enable;
    uint32_t trigger_dutycount[MP_PWM_TRIGGER_COUNT_MAX];
    uint8_t adc_count;
    uint8_t adc_intr_index;
    hpm_adc_t* adc_pack;
    hpm_mp_adc_over_callback adc_over_callback;
    void* adc_handle;
} hpm_pwm_pair_t;
 
typedef struct
{
    uint8_t pwm_index;
    uint8_t pwm_map_index;
    uint32_t pwm_freq;
    uint32_t bus_freq;
    uint32_t reload_count;
    uint32_t duty_count;
    uint32_t shadow_dutycount;
    bool fault_enable;
    hpm_pwm_fault_t pwm_fault;
    uint8_t trigger_count;
    uint8_t trigger_enable;
    uint32_t trigger_dutycount[MP_PWM_TRIGGER_COUNT_MAX];
    uint8_t adc_count;
    uint8_t adc_intr_index;
    hpm_adc_t* adc_pack;
    hpm_mp_adc_over_callback adc_over_callback;
    void* adc_handle;
} hpm_pwm_t;
 
typedef struct
{
    uint8_t pwm_pair_count;
    uint32_t pwm_sync_time_us;
    hpm_pwm_pair_t* pwm_pair;
} hpm_mp_t;
 
typedef void (*mp_timer_cb)(void);
 
#ifdef __cplusplus
}
#endif
 
#endif //MP_COMMON_H